Improved synaptic behavior under identical pulses using AlO x/HfO 2 bilayer RRAM array for neuromorphic systems. Algorithm for training neural networks on resistive device arrays. Monolithic 3D integration of high endurance multi-bit ferroelectric FET for accelerating compute-in-memory. A compute-in-memory chip based on resistive random-access memory. Fully hardware-implemented memristor convolutional neural network. Training and operation of an integrated neuromorphic network based on metal-oxide memristors. Equivalent-accuracy accelerated neural-network training using analogue memory. Acceleration of deep neural network training with resistive cross-point devices: design considerations. In-memory learning with analog resistive switching memory: a review and perspective. Neuro-inspired computing with emerging nonvolatile memorys. The next generation of deep learning hardware: analog computing. Memristive crossbar arrays for brain-inspired computing. Carbontracker: tracking and predicting the carbon footprint of training deep learning models. Through monolithic integration with silicon transistors, we show that pseudo-crossbar arrays can be created for area- and energy-efficient deep learning accelerator applications.Īnthony, L. They are also compatible with complementary metal–oxide–semiconductor technology and can be scaled to lateral dimensions of 150 × 150 nm 2. They can be programmed at frequencies approaching the megahertz range and exhibit endurances of over 100 million read–write cycles. These devices offer multistate and symmetric programming of channel conductance via gate-voltage pulse control and small cycle-to-cycle variation. Here we report an electrochemical synaptic transistor that operates by shuffling protons between a hydrogenated tungsten oxide channel and gate through a zirconium dioxide protonic electrolyte. They should also be compatible with silicon technology and scalable to nanometre-sized footprints. However, the core memory devices must be capable of performing high-speed and symmetric analogue programming with small variability. In-memory computing architectures based on memristive crossbar arrays could offer higher computing efficiency than traditional hardware in deep learning applications.
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